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Most FET (field-effect transistor) and some bipolar integrated circuit chips require a substrate bias in addition to ground and plus (or minus) supply.
English (United States)
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Integrated Circuit Chip with Ground Reference Generator
Most FET (field-effect transistor) and some bipolar integrated circuit chips
require a substrate bias in addition to ground and plus (or minus) supply.
To avoid a separate generation of bias with a polarity opposite to that of the
supply), the bias connection is applied to system ground CHG in accordance with
the circuit of Fig. 1 and a chip inherent ground CHG is generated. This circuit
can be integrated on the chip, with supply lines for the bias being avoided. In
the case of a positive supply the bias is more negative than CHG.
Fig. 2 shows details of the ground reference generator shown in Fig. 1. The
six FETs are marked T1 - T6, and the three capacitances are marked C1 - C3.
Transistors T1 and T2 act as a simple resistive divider to establish a
reference voltage as a percentage of power supply voltage +V. T5 is required to
provide a low impedance sink for ground current. T4 is used to detect any
deviation between reference node A and output CHG. Any deviation is amplified
by the impedance ratio of T3/T4 and used to control the gate of T5. It is
desirable to provide maximum amplification at node B consistent with the
required frequency response. C1 and C2 at node A and C3 at the output are
decoupling capacitances, as required. Because output voltage CHG is
approximately controlled by node A, there is inherent compensation of CHG with
device threshold variations. Transistor T6 provides active feedback to...