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Self Aligned Guard Ring Isolation Scheme for MOSFET Circuits

IP.com Disclosure Number: IPCOM000054732D
Original Publication Date: 1980-Mar-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Ning, TH Chao, HH [+details]

Abstract

A novel self-aligned p-type guard ring isolation for use with non-recessed oxide in MOSFET integrated circuits is described. This isolation scheme results in significantly reduced wiring capacitance, reduced sensitivity to leakage currents coming from the field regions, and reduced sensitivity to alpha particle ionization effects.