Self Aligned Guard Ring Isolation Scheme for MOSFET Circuits
Original Publication Date: 1980-Mar-01
Included in the Prior Art Database: 2005-Feb-13
A novel self-aligned p-type guard ring isolation for use with non-recessed oxide in MOSFET integrated circuits is described. This isolation scheme results in significantly reduced wiring capacitance, reduced sensitivity to leakage currents coming from the field regions, and reduced sensitivity to alpha particle ionization effects.