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A logic circuit is incorporated into a processor-driven keyboard/display system for handling both adapter testing and I/O identification.
English (United States)
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Diagnostic Testing and I/O Identification
A logic circuit is incorporated into a processor-driven keyboard/display
system for handling both adapter testing and I/O identification.
When a data handling system includes two or more optional I/O devices, it is
necessary, upon power-on, to identify the I/O devices present and then perform
an appropriate test routine. This I/O identification is generally accomplished
through the use of a diagnostic testing program. A special ID command is
decoded, and the decode in turn gates a programmed ID data byte onto a data
bus. The ID byte is then decoded by the diagnostic program to determine if a
selected I/O device is present. If a display is an I/O in the above, signals are
output to the display upon power-on.
It has been found desirable to inhibit at least some of the signals output to the
display until an adapter for the display has been tested and determined to be
working. I/O identification operations, if performed, are done prior to the adapter
test. The illustrated circuit provides a means for sequentially handling diagnostic
testing and I/O identification.
Upon power-on, a test latch 11 is set for inhibiting the gating of diagnostic
signals 4, 5, and 6 along lines 8, 10, and 9, respectively. At this time, outputs 1,
2, and 3 should be low, high, and low, respectively. If so, the adapter is
functioning properly. A diagnostic program then provides a diagnostic enable
signal along line 12 for enabling a group of bus driv...