Low Profile Chip Carrier With Integral Cooling Means
Original Publication Date: 1980-Apr-01
Included in the Prior Art Database: 2005-Feb-13
This article discloses a semiconductor die with a wiring skirt in which the semiconductor chip is mounted on a membrane-like insulating member which provides multilevel wiring and interconnections between the chip mounted thereon and a secondary structure such as a metallized ceramic substrate. Fig. 1 illustrates the basic fabrication and assembly sequence of the process.