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Parallel Carry Adders Listing Two Bit Groups

IP.com Disclosure Number: IPCOM000054865D
Original Publication Date: 1980-Apr-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Nicholson, JO [+details]

Abstract

Conventional parallel-carry networks for digital adders (or subtractors) propagate carries across hierarchical groups of four bits. Although this is efficient for bipolar transistor technologies, field-effect transistor (FET) circuits can be more efficient with two-bit carry propagation. Also, the inherent "dot-OR" capability of FET integrated technology allows a further reduction in circuit area and power.