Browse Prior Art Database

Multiprocessor Communication System

IP.com Disclosure Number: IPCOM000054905D
Original Publication Date: 1980-Apr-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Bowater, RJ Buttimer, MD Cowlishaw, MF Milward, DA [+details]

Abstract

There are many advantages in designing a microprocessor-based test tool or similar complex system such that a number of microprocessors are used, with each controlling a particular aspect of the system and sharing some common main storage. However, if those processors are to interact in any way, it must be ensured that not more than one processor is updating the same main storage at the same time. This can be done using a hardware 'bus interlock' mechanism which requires additional hardware sophistication and means that processors are prone to 'under-run' while locked out from the bus. This article describes a multiprocessor communication system (MCS) implemented in software for achieving the same aim and which also preserves modularity and provides a common interface between processors.