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Integrated Circuit Processing Concept Disclosure Number: IPCOM000054918D
Original Publication Date: 1980-Apr-01
Included in the Prior Art Database: 2005-Feb-13

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Silvestri, VJ Tang, DD [+details]


This article describes a processing concept for integrated circuit chips starting with alternate stacks of conducting and insulating films on the substrate (wafer). The thin conducting film (e.g., poly-Si) is doped locally to the desired type of conductivity through a masking procedure to serve as a conducting path between active devices. The stacks of films are either etched to expose the conducting film or etched down to the substrate, as illustrated in Fig. 1. An epi/polysilicon co-deposition is then carried out to grow films over the entire wafer. The epi film grown on the substrate opening therefore connects to the conducting film through its sidewall area, as shown in Fig. 2.