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Misregistration Compensation in Multilayer Structures

IP.com Disclosure Number: IPCOM000054997D
Original Publication Date: 1980-May-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Dougherty, WE [+details]

Abstract

The vias in multilayer ceramic (MLC) structures are often misregistered after sintering due to non-uniform shrinkage of the ceramic. If additional layers of dielectric and metallurgy are to be fabricated, this misregistration must be compensated for. One method for doing this would be to use separate layers in order to "normalize" the vias. The disadvantage of this is that it adds another layer to the structure and additional vias which in turn will reflect itself in yield and cost. A second method would be to provide a sufficient clearance around each via to compensate for misregistration. The disadvantage in this case is that in order to provide enough clearance, any voltage plane (Vc) employed will be diminished by so much that the di/dt noise tolerance will be exceeded and the vc/vt capacitance values will be too low.