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High Density PLA/ROS Arrays with Efficient Use of Active Devices

IP.com Disclosure Number: IPCOM000055018D
Original Publication Date: 1980-May-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Ritchie, LC Ting, YM [+details]

Abstract

Disclosed is a technique to efficiently use PLA/ROS array diodes. This technique is particularly useful in employing a logic masterslice where the number of devices is limited, but extra wiring channels are available.