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Error Detecting Code for Buffered Disk Disclosure Number: IPCOM000055059D
Original Publication Date: 1980-May-01
Included in the Prior Art Database: 2005-Feb-13

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Hodges, P [+details]


The flow chart of Fig. 1 discloses a process which can be implemented by a microprocessor for detecting errors which might occur when data is supplied to a writable control store from an initial program load (IPL) device. In Fig. 2, control store 10 of a control unit 11 is a volatile type memory which must be loaded with data when the system is powered up. The data is permanently stored on a non-volatile type memory, such as a diskette drive 13, and supplied to control store 10 through a buffer 15 which converts the serial by bit data on line 16 to parallel by bit data on line 17. A microprocessor 20 is also supplied with the parallel by bit data from buffer 15 during the IPL operation and functions to detect any errors which have occurred in the transfer process.