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Multiple LSI Silicon Chip Modules With Power Buses Composed of Laminated Silicon Sheets With Metallized Upper and Lower Surfaces

IP.com Disclosure Number: IPCOM000055115D
Original Publication Date: 1980-Jan-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Ho, CW Yu, HN [+details]

Abstract

In the preceding article, a package for bipolar and FET chips adapted to use in high speed computers is described. A number of power buses are composed of metal which is laminated and inserted into slots in a ground plane. The buses employed are composed of laminated sheets of molybdenum. Fig. 1 shows a modified version of the package described in the preceding article. Fig. 1 shows a module 7 including a number of power buses 10 composed of power plane sheets 11 composed of silicon separated by layers of dielectric material 13. Signal pins 18 extend through the module between the power buses 10. Pins 18, carrying ground voltage Vc to transistor collectors, also support module 7 above circuit board 6. Pins 18 marked S are electrically insulated from metal conductor planes for carrying current at potential Vc.