Chip with Different Substrate Voltage Areas
Original Publication Date: 1980-Jun-01
Included in the Prior Art Database: 2005-Feb-13
A method is proposed for providing separate areas with different substrate voltages on a common integrated circuit chip. As a result, low capacitances and breakdown voltages as well as densely integrated structures are obtained for selected components in particular partial chip areas. The method is also advantageous for FET semiconductor chips, as it permits different threshold voltages being obtained by varying the substrate voltages.