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Delay Circuit with Voltage-Controlled FET Capacitance Disclosure Number: IPCOM000055240D
Original Publication Date: 1980-Jun-01
Included in the Prior Art Database: 2005-Feb-13

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Arzubi, L Baier, E Loehlein, WD [+details]


A voltage-controlled inversion layer FET capacitance for generating an accurate turn-off point and a fast output signal is introduced into a conventional delay circuit for very long delays.