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A high performance bipolar transistor with low collector-base capacitance is fabricated by a method exploiting the differential oxidation rates of N++ and N- silicon.
English (United States)
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Bipolar Transistor Fabrication
A high performance bipolar transistor with low collector-base capacitance is
fabricated by a method exploiting the differential oxidation rates of N++ and N-
The recessed oxide-isolated device area of Fig. 1 is formed by placing N+
subcollector 1 into substrate 2, growing N- epi 3 and then forming oxide-filled
deep trench 4 and shallow trench 5. The structure of Fig. 1 is oxidized (6) to 300
angstroms followed by the depositions of 300 angstroms silicon nitride 7 and
2000 angstroms of pyrolytically deposited oxide 8 (Fig. 2). The oxide, nitride and
oxide layers are etched away except in the emitter region 9 and collector reach-
through region 10. The exposed silicon is etched to the depth of the base region,
and arsenic 11 is implanted.
The resulting structure is oxidized to about 2000 angstroms, as shown in Fig. 3. It should be noted that the oxide thickness 12 grown on the implanted region
is substantially thicker than the oxide 13 grown on the sidewalls of the etched
silicon mesa because of the higher growth rate on the more heavily doped
silicon. The arsenic implanted silicon underneath oxide 12 is N++, whereas the
epi material contiguous to oxide 13 is N-.
The oxide is etched, thereby removing thin oxide 13 but retaining some of the
thicker oxide 12, as depicted in Fig. 4. Then 2500 angstroms of polycrystalline
silicon 14 is deposited and planarized (Fig. 5). The transistor device is
completed by etching pyro 8, growin...