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Clock Synchronization Circuit Disclosure Number: IPCOM000055595D
Original Publication Date: 1980-Aug-01
Included in the Prior Art Database: 2005-Feb-13

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Austin, WL [+details]


In a testing environment, two seven-bit frames of data are transmitted from a master unit to a distant slave circuit. Three response bits are returned to the master unit. This article describes a technique for synchronizing the master and remote clock rings.