Single Thyristor Static Memory and its Fabrication
Original Publication Date: 1980-Aug-01
Included in the Prior Art Database: 2005-Feb-13
A single thyristor memory cell in static mode operation is shown in the Figs. 1A-3I. This cell has high packing density in comparison to prior static memories. Both the PNP and NPN transistors in this cell are vertical devices and right-side up or non-inverse devices. The current gain control (Alpha or Beta gains) of both of these devices will be much better than that of the lateral PNP devices in prior memories.