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Three Speed Design in a Single Masterslice Gate

IP.com Disclosure Number: IPCOM000055638D
Original Publication Date: 1980-Aug-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Beranger, H Brunin, A [+details]

Abstract

Logic circuits are generally implemented on masterslices wherein T/2/L (transistor-transistor logic) gates are implanted side by side. During a personalization step the gates are wired to perform the desired logic function.