Browse Prior Art Database

High Speed Latch

IP.com Disclosure Number: IPCOM000055642D
Original Publication Date: 1980-Aug-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Beranger, H Brunin, A [+details]

Abstract

The latch shown in the drawing has a reduced pulse width and provides a non-clamped output. Transistors T2 and T3 are base to collector cross-coupled transistors.