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Testing of Dynamic Read Write Memory Arrays

IP.com Disclosure Number: IPCOM000055770D
Original Publication Date: 1980-Sep-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Linton, RH Wager, AJ [+details]

Abstract

Earlier articles [1,2] relate to methods of varying the sensing signal reference voltage applied by a dummy cell to a differential sense amplifier in a single-device memory cell environment. In this method the voltage, either AC or DC, which provides the reference signal for sensing is reduced to a value which causes the memory chip to fail on each test pattern. A chip input pad is made available for this purpose. The amount of decrease in reference signal level for proper operation will be reduced for more complicated test patterns. After characterizing the level of decrease of many chips, the difference between the voltage reduction required for simple and complex patterns is calculated.