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In the exclusive OR circuit shown in Fig. 1A, the comparison of the two input levels A and B is made through transistors T1 and T2 which are controlled via Schottky diodes S1 and S2.
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Noise Immunity Exclusive or Circuit
In the exclusive OR circuit shown in Fig. 1A, the comparison of the two input
levels A and B is made through transistors T1 and T2 which are controlled via
Schottky diodes S1 and S2.
To improve the low down-level noise immunity which prevents a wide bed of
logic down levels from being used, the forward voltage of the Schottky diodes S1
and S2 is reduced by using these diodes at a very low current IF. Current IF is
limited by resistors R1B and R2B which are attached to low artificial supplies
provided by Schottky diodes S1B and S2B Diodes S1B and S2B may be the
same size as S1 and S2. In this case 60 mV only are provided across resistor
R1B or R2B, and the current through diode S1 or S2 is only 6.7 mu A when the
resistance of R1B is 9 k omega.
Schottky diodes S1B and S2B are integrated in the same bed as diodes S1
and S2, respectively, since they have a common cathode. Consequently, the
whole bed does not take more area than the Schottky diode bed alone. Since
the anode of diode S1B is very small, it can be placed by the side of the cathode
as shown on the drawing.
In the circuit of Fig. 1B, the Schottky diodes S1 and S2 are replaced by
transistor T1B and T2B emitter to collector voltages. These VCE voltages are to
resistor bridges R1, R1B and R2, R2B. Current I of transistor T1B or T2B is
limited by the value of R1 or R2, respectively, and VCE(T1B) = VBE - R1B.I
VCE(T2B) = VBE - R2B.I If VD is the down level, the threshold volt...