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Use of Independent Error Detection Systems for Field Replaceable Units

IP.com Disclosure Number: IPCOM000055840D
Original Publication Date: 1980-Sep-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Blum, A [+details]

Abstract

A prerequisite for the application of the LSSD (Level Sensitive Scan Design) principle for LSI testing is the use of master/slave flip-flops which are connected in the form of shift registers to input data into and output them from the logic structure. In comparison with logic made up of simple polarity-hold latches, master/slave flip-flop logic is rather extensive. If the polarity-hold latches are connected in the form of shift registers, fifty per cent of the data is invariably lost.