Positive Ground Bounce Protection Circuit
Original Publication Date: 1980-Oct-01
Included in the Prior Art Database: 2005-Feb-13
The use of multi-chip packages with high speed TTL + (transistor-transistor logic) chips causes a large exposure to noise, triggering input chip select circuits. During decode or array discharge time, a selected chip will generate large fast rising ground currents. A large positive voltage will occur on the internal module ground lines shared by other chips which are in standby. Since the select lines of the standby chips which are at 2.2 V do not track with the internal ground bounce, the signal across the gate to source of a common source input device is reduced, thus falsely selecting the chip.