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Walled Emitter Fabrication Process

IP.com Disclosure Number: IPCOM000056010D
Original Publication Date: 1980-Oct-01
Included in the Prior Art Database: 2005-Feb-13

Publishing Venue

IBM

Related People

Authors:
Gaur, SP Horng, CT Hwang, BT Lillja, H [+details]

Abstract

High bipolar device current gain, high breakdown voltage and low reverse leakage current are achieved by the elimination of the sidewall portions of the emitter-base junction in shallow junction bipolar transistors. The emitter-base junction is butted against recessed oxide while the extrinsic base region underneath the recessed oxide is heavily doped to reduce base resistance.