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This technique for improving thermal enhancement reduces the stress applied to the semiconductor, improves thermal conductivity between the device and the cap or heat sink, and reduces the cost.
English (United States)
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Structure for Achieving Thermal Enhancement in a Semiconductor
This technique for improving thermal enhancement reduces the stress
applied to the semiconductor, improves thermal conductivity between the device
and the cap or heat sink, and reduces the cost.
In this method a metallization layer 10, which is solder wettable, is applied to
the inside surface of cap 12, shown in broken section. The metallurgy can be
placed over the entire surface, as shown, or only over the area above devices 14
which are solder bonded to the substrate 16. Substrate 16 can be any suitable
type, typically a multilayer ceramic substrate, with internal metallurgy and I/O
pins 18 bonded to the lower surface thereof. The metallurgy 10 can be applied
when metallizing the seal band (not shown) on the cap 12, which is typically a
thin layer of molybdenum plus a nickel layer with a thin gold plating.
Subsequently, a low-melting solder layer 20 is applied over layer 10. This layer
can be conveniently applied by re-flowing a suitable solder pre-form formed of a
suitable solder alloy, for example, a CERROBEND* eutectic alloy having a
melting point in the range of 70 to 100 degrees C. These alloys can be obtained
with little or even negative shrinkage on cooling. A thin layer of thermal grease
on the order of .001 to .002 inch is deposited over the solder layer 20, the cap
12 assembled in overlying relation to the substrate 16, and a light pressure
applied. The cap is sealed to the substr...