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Efficient Memory Cell useful for DC Testing Disclosure Number: IPCOM000056193D
Original Publication Date: 1980-Nov-01
Included in the Prior Art Database: 2005-Feb-14

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Culican, EF Varadarajan, HD [+details]


A logical approach to avoid two-pass testing of embedded random-access memories is to be able to skip AC testing of on-chip memories. The advantage also is the saving in overhead needed for AC testing on a chip.