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Dense Capacitive ROM Array Disclosure Number: IPCOM000056386D
Original Publication Date: 1980-Dec-01
Included in the Prior Art Database: 2005-Feb-14

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Kotecha, HN Wiedman, FW [+details]


This read-only memory (ROM) array has orthogonally crossing conductive layers or strips with selected crosspoints being programmed to include diode-type, graded band gap insulators, with the remaining crosspoints of the array having normal or ordinary dielectric material or insulation between the orthogonal layers. A plurality of arrays may be stacked one over another, and a silicon substrate on which the conductive layers are mounted includes support circuitry made in field-effect transistor or bipolar technology, or a combination of these technologies. The graded band gap insulators are described in U. S. Patent 4,104,675.