Browse Prior Art Database

Two Stage Batch Chip Feed and Locating System

IP.com Disclosure Number: IPCOM000056411D
Original Publication Date: 1980-Dec-01
Included in the Prior Art Database: 2005-Feb-14

Publishing Venue

IBM

Related People

Authors:
Caccoma, GA Koestner, JH O'Neill, BC [+details]

Abstract

A two-stage batch chip feed and locating system is provided for parallel chip feed and locating for multichip modules. A coarse chip locator, fed by a plurality of chip banks, is used to initially locate the parallel-fed chips. Parallel vacuum chip pickup means are employed to move the coarsely located chips to a fine chip locator positioned on a shrink compensator with the latter effective upon fine chip location to merge the chips in close proximity to one another for final positioning on the multichip module.