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Via Reliability Problem Eliminated by an Offset Elliptical Via

IP.com Disclosure Number: IPCOM000056687D
Original Publication Date: 1988-Jan-01
Included in the Prior Art Database: 2005-Feb-14

Publishing Venue

IBM

Related People

Authors:
Buker, ED Ringey, MA [+details]

Abstract

By replacing round vias with offset elliptical vias in semiconductor designs, a reliability problem caused by metal fatigue can be eliminated. As semiconductor design ground rules become increasingly severe in order to accommodate higher device densities, standard deviations in line widths, via diameters and process parameters are beginning to impact current design practices. Metal fatigue cracks occurring at the edge of interlevel via contacts is a case in point. A potential reliability problem exists when a circular via overlaps the edge of a steep first level metal side wall. This is due to a coincidence of opposite standard deviations between an underlying metal line and an interlevel via. Fig. 1 shows an ideal interlevel via centered over an ideal first level conductor (M1) line so as to maximize contact area. Fig.