High Performance Transfer Gate Circuit With Look-Ahead to Count Leading Zeros
Original Publication Date: 1988-Feb-01
Included in the Prior Art Database: 2005-Feb-14
A novel transfer gate circuit implementation of the count leading zero (CLZ) function, with a simple look-ahead scheme for enhanced performance to detect the occurrence of the first "1" in the incoming message is described below. This realization results in improved overall performance compared to prior-art conventional ripple implementation and requires minimal additional area. The CLZ function requires that the output of the circuit be equal to the input, until the occurrence of the first logical "1". The circuit must provide a logical "1" output in the bit position associated with the logical "1" input and all succeeding output bits, regardless of bit input. (Image Omitted) The circuit illustrated in Fig. 1 is a transfer gate realization comprising a pair of transfer devices and a pair of inverters.