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Electrical Behavior of an Organically-Seeded Substrate Surface

IP.com Disclosure Number: IPCOM000056963D
Original Publication Date: 1988-Feb-01
Included in the Prior Art Database: 2005-Feb-14

Publishing Venue

IBM

Related People

Authors:
Cadigan, MJ Czarnecki, KR Markovich, V Olmsted, MM Sambucetti, CJ Zarr, RS [+details]

Abstract

A particular method of manufacturing a printed circuit board (PCB) results in residuals of palladium and tin seeder on an epoxy surface. A reliability concern with residual seeder is that, when combined with moisture, it can cause an electrical fail on the board surface and/or form a path for copper migration. This concern is addressed in a process control which eliminates residual seed reliability concerns. The process control is established as a result of the following study. Palladium and tin seed are applied to epoxy surfaces. Each epoxy surface is free of drilled holes and circuitization to assure uniform coverage of the seeder. The lack of copper circuitry also assures that any electrical fail would be due to palladium and tin only.