Browse Prior Art Database

Purging Computer Cache Memories

IP.com Disclosure Number: IPCOM000057016D
Original Publication Date: 1988-Feb-01
Included in the Prior Art Database: 2005-Feb-14

Publishing Venue

IBM

Related People

Authors:
Hsu, PYT Stone, H [+details]

Abstract

A technique is described whereby cache memories and cache-like memories, as used in multi-processor computer systems, are purged in an efficient manner so as to improve overall processing speed of the system. The concept is an improvement over systems that require a delay or halt in computations while a cache memory purge takes place. Multi-processor computer systems require cache memories to be purged of data and instructions when that process migrates from one processor to another. Purging typically requires a succession of reads to the cache memories to interrogate them for the presence of a specific process. During the purge, the processor cannot perform useful computation. The length of time needed to perform the purge is proportional to the size of the cache memories.