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PUSH-PULL OUTPUT FOR A THREE-INPUT NOR LOGIC CIRCUIT USING GaAs MESFET

IP.com Disclosure Number: IPCOM000057068D
Original Publication Date: 1988-Mar-01
Included in the Prior Art Database: 2005-Feb-14

Publishing Venue

IBM

Related People

Authors:
Cheung, SK Ogura, S [+details]

Abstract

A push-pull circuit has been developed for GaAs logic technology in semiconductor devices. The method configures available devices, such as depletion and enhancement mode GaAs metallized semiconductor field effect transistors (MESFETs), to achieve the desired circuitry. In push-pull circuitry it is desirable to reduce the capacitive loading effect on circuit delay and thereby increase circuit performance. A source follower circuit which has been in use (Fig. 1) PUSH-PULL OUTPUT FOR A THREE-INPUT NOR LOGIC CIRCUIT USING GaAs MESFET- (Image Omitted) does not provide driving capability for a high capacitive loading. If output devices T2 and T3 are increased in size, power dissipation will also be increased. The power dissipation is also adversely affected by the depletion device T3 which is ON continuously.