Checking Asynchronous Parity
Original Publication Date: 1988-Apr-01
Included in the Prior Art Database: 2005-Feb-15
A method for detecting hard errors on a group of unrelated, asynchronous, uni-directional signals from one digital device to another, involves the addition of only a single parity line. Previously, evaluating parity on a group of unrelated signals has been difficult to perform without the addition of other "clocking" or "data-valid" signals, or without a long list of assumptions specific to a particular implementation. By being able to selectively use sampled values of the signals with their parity (identifying cycles as stable or unstable) true parity errors can be detected and invalid momentary occurrences of bad parity (because of parity generation delay, skew, and noise) can be ignored.