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Debug Method for Logic Card

IP.com Disclosure Number: IPCOM000057646D
Original Publication Date: 1988-Jun-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Imoto, N Nakamura, T Niimi, S [+details]

Abstract

This article describes a debug method with external good modules and external enable signals. A logic card is so designed that each of plural modules on it has the external enable signals and a functional tester can access these signals. The tester has a special test card comprising good modules which are identical to the modules on the logic card. When the logic card fails, the tester disables a selected module on the logic card and enables a corresponding module on the tester. It means each module on the logic card is swapped logically by the good module on the tester. A failing module is found by repeating this test for the other modules. Thus, the module can be debugged easier and the exact failing module defined automatically. Fig. 1 shows a configuration for implementing this method. A logic card under test, i.e.