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Submicron Lines With Small Dimensional Variation

IP.com Disclosure Number: IPCOM000057756D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Cote, WJ [+details]

Abstract

By a process which includes reducing photographically produced line image openings by sidewall coating and forming an etch resist on poly-crystalline silicon (polysilicon) by selective deposition, conductive lines are created having dimensions smaller than can be created uniformly by standard photo techniques. This process also allows creating lines having variable width without additional process steps. Referring to Fig. 1, a non-planar insulating substrate 2 is coated with a layer of poly-crystalline silicon (polysilicon) 4.