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Method for Analyzing a Phase-Locked Loop for False Lock

IP.com Disclosure Number: IPCOM000057806D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Boerstler, DW Scott, TR [+details]

Abstract

A phase-locked loop has a variable frequency oscillator, a frequency reference and a circuit that compares the reference and the output of the oscillator and adjusts the oscillator toward the frequency and phase of the reference. The oscillator is commonly a voltage controlled oscillator (VCO). When the phase-locked loop is part of a circuit for extracting 0 and 1 bits from a serial data stream, the reference frequency is part of the data signal and the oscillator output forms a clock signal. The phase detector may include a latch that is set and reset as the clock frequency varies above and below the data frequency. Thus, the phase detector has a time-varying output, designated g(t). A filter smooths this output and applies it to the VCO.