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Combining Floating-Point Increments in Multiprocessors

IP.com Disclosure Number: IPCOM000057838D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Norton, A Pfister, GF [+details]

Abstract

A technique is described whereby an integer fetch-and-add increment combining operation is utilized, simultaneously without serialization, so as to implement floating-point addition for multiprocessor systems. The concept is an improvement over previous systems, in that negative increments are now handled correctly and efficiently. In many parallel multiprocessor applications, particularly in solving numerical problems, it is periodically necessary for all processors to increment a floating-point value. Since several processors attempt to update values simultaneously, it is necessary to ensure that the result of such updates meets the "serialization principle", which is: "The result of many simultaneous updates shall be the same as if the results occurred in some (unspecified) order".