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Efficient Microcode Error Handling Technique

IP.com Disclosure Number: IPCOM000057891D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Buckland, PA Chao, GT Seeley, BD Solie, DW [+details]

Abstract

A method is described which allows an Input/Output (I/O) processor to minimize the amount of microcode and overhead required to handle multiple error conditions. The IBM RT-PC Enhanced ESDI (EESDI) hard file adapter card uses an on-card processor to control most card functions. This requires the processor to handle many types of error conditions. This error handling can require a considerable amount of overhead to implement. To minimize this overhead, the RT-PC hardfile adapter uses a unique subroutine return method to allow multiple error conditions to funnel into a single error handler very efficiently. This method allows the RT-PC Function ESDI hard file adapter processor to have a single error handler routine that is easily executed.