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Plastic Package for Semiconductors With Integral Decoupling Capacitor Disclosure Number: IPCOM000057903D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

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Howard, RT Phelps, DW Redmond, RJ [+details]


A method is shown for incorporating a decoupling capacitor (extendable to thermal diodes and chip resistors) into a plastic semiconductor package utilizing a chip as the internal attachment pad. The practice of mounting decoupling capacitors separately in plastic package design implementations increases lead inductance due to longer lead lengths and precludes the use of low valued miniature capacitors. Incorporating the decoupling capacitor in the first level package allows the use of low valued (picofarad level) capacitors, minimizes inductive lead lengths and removes the need for capacitor hidden solder joints which cannot be inspected. The technique utilized to fabricate the integral chip/capacitor package is shown in Figs. 1 through 4. Shown in Fig. 1 are the various elements of the assembly in their juxtaposition. Fig.