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Regrown Complementary Semiconductor Structure

IP.com Disclosure Number: IPCOM000057919D
Original Publication Date: 1988-Jul-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Baratte, H Wright, SL [+details]

Abstract

Complementary field-effect transistors with self-aligned gallium arsenide gates can be fabricated by regrowth to provide low access resistance, reduced spacing between the gate and source or drain, and one type of metallurgy patterned concurrently for all contacts. A construction process for the basic complementary inverter is described. In Fig. 1, the starting material is undoped, consisting of a gallium arsenide buffer layer 1, an aluminum gallium arsenide insulator 2 and a thin gallium arsenide cap layer 3. An n-type device (Image Omitted) 4 is formed along the front of divider 5 and a p-type device 6 is formed along the rear of the divider. Source regions 7 and drain regions 8 of each device and isolation region 9 are etched by a silicon nitride mask over gate regions 10.