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Automatic Test Method for LSI Module

IP.com Disclosure Number: IPCOM000057937D
Original Publication Date: 1988-Aug-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Matsushiba, T Nakamura, T [+details]

Abstract

Described is a method to test an LSI Module using its internal test circuit. One of the key problems in testing logic cards is how to test the LSI modules mounted. It was difficult to check the assembly miss of the LSI module with narrow lead pitch automatically. (Image Omitted) Fig. 1 shows a SMC having a logic circuit 10, input pins IA1, IB1, IBM, and output pins OA1, OB1, ... OAN, OBN. In addition, it includes an internal test circuit comprising a pair of OR gates 11A and 11B connected with the input pins, a group of OR gates 12 and a group of AND gates 13 associated with the output pins. The test circuit is so designed to handle the pins alternately. Fig. 2 shows a test flow.