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Processor-Controlled Battery Back-Up Power Supply Architecture Disclosure Number: IPCOM000058004D
Original Publication Date: 1988-Aug-01
Included in the Prior Art Database: 2005-Feb-15

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Eng, RC Galella, JW Hamel, WF Stelzer, EH [+details]


This article describes a technique in a data processing system which provides for user application software and/or system firmware to react to power outages so that system and data integrity are maintained. The technique disclosed herein controls the battery back-up capabilities of a DC power supply. The necessity for a battery back-up power supply is to provide DC voltages within tolerance to accomplish the following: 1) Allow a system to function during a short power line failure (glitch). 2) Allow a system ample time to store critical data into non-volatile storage during a power failure. The conventional way to meet these requirements is to provide a system with a preset time limit in which DC voltages are good after loss of input power. This time limit is generated by hardware inside the power supply.