Digital Bit Packing and Unpacking Hardware
Original Publication Date: 1988-Aug-01
Included in the Prior Art Database: 2005-Feb-15
A method and hardware implementation is described to facilitate bit packing and bit unpacking operations for use in signal processing operations. Many signal processing operations generate digital codes which require K digital bits to uniquely represent the code. In order to minimize the storage space required on a machine that uses P bits per code, a packing operation must be performed. In order to recover the original codes, a bit unpacking operation must be used. This operation has been performed by programs executing on general-purpose computers; however, general-purpose computers require a substantial number of instructions and performance could not be optimized. In addition, general-purpose computers executing programs to handle these operations have trouble coping with variable bit length code packing operations.