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Off-Chip Driver for Continuous Read Access

IP.com Disclosure Number: IPCOM000058053D
Original Publication Date: 1988-Aug-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Sunaga, T [+details]

Abstract

This article describes an off-chip driver (OCD) circuit to maximize a data valid time duration in a continuous read access mode. The OCD circuit changes its output data continuously without returning to a high Z (impedance) state. In semiconductor memory chips, it is a very common way to read a set of consecutive address data. OCD circuits in those chips usually reset the data to a high Z state before they change to the next memory address data. An externally supplied pulse, e.g., CAS, controls the timing. In a high-speed memory chip, the time duration in which the data remains valid is comparatively short because of the high Z state. (Image Omitted) It, therefore, becomes difficult for an external chip to read the data correctly when the memory chip is operating at a fast read cycle time.