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Optimized Device and Decoder for an 8-Bit Resistive DAC

IP.com Disclosure Number: IPCOM000058155D
Original Publication Date: 1988-Sep-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Delaunay, A Hauviller, P Verhaeghe, M [+details]

Abstract

The described device is intended to be used in 8-bit digital-to-analog converters (DACs). It has 8 digital inputs and one analog output. The device is powered between a positive supply VP and ground and provides an analog voltage function of 8 digital inputs A7 to A0. Voutput = A7*27+A6*26+A5*25+A4*24+A3*23+A2*22+A1*21+A0*20+Voffset Where A7 to A0 is equal to 0 or 1, and Voffset is the output voltage when all inputs are at low level. A7B, A6B, A5B, A4B, A3B, A2B, A1B, A0B are the inverted input signals which are supposed to be available. The device lay out has a complex shape composed of: - N+ implantation defined by polycrystalline silicon - Polycristalline Silicon stripes The N+ implantation pattern has 256 identical and repetitive patterns numbered from 0 to 255.