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Scan Path Reconfiguration for Improved Diagnostic Resolution in Multi-Chip Modules

IP.com Disclosure Number: IPCOM000058291D
Original Publication Date: 1988-Sep-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Donica, GM McDonald, JE [+details]

Abstract

A problem exists in diagnosing a defective level-sensitive scan design (LSSD) scan string in a multi-chip module environment given the constraint that the only points accessible to observe signal switching activity are the scan string input pin and scan string output pin. This situation arises when a through-the-pins test without probe capability is used because of packaging considerations. (Image Omitted) Any latch in a scan string with a stuck-at fault causes the stuck-at value to be propagated indefinitely to the scan-out pin regardless of the data applied at the scan-in pin. Therefore, no information concerning the location of the fault can be discerned from the scan-output data. With the Scan Path Reconfiguration design (see Fig. 1), two unique scan string defects can be diagnosed to the chip level for each string.