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This disclosure utilizes resist patterns for preserving N resistor regions during P+ doping of semiconductor devices in conjunction with heterojunction bipolar transistor (HBT) fabrication.
English (United States)
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N-TYPE RESISTORS IN GaAs HBT TECHNOLOGY
This disclosure utilizes resist patterns for preserving N resistor regions during
P+ doping of semiconductor devices in conjunction with heterojunction bipolar
transistor (HBT) fabrication.
The base pedestal etch mask is then used for delineation of resistor widths. The
present method provides resistors whose sheet resistance is the same as HBT's
N emitter. A feature of the N-type resistor is N+ regions for obtaining good ohmic
contacts, the N+ regions being formed simultaneously with HBT's N+ emitters.
The process begins with a conventional method to form layers on an undoped
GaAs substrate 1 (Fig. 1). The layers, which may be formed through molecular
beam epitaxy (MBE) or metal oxide chemical vapor deposition (MOCVD), are: N+
GaAs 2, N AlGaAs 3, P GaAs 4, N AlGaAs 5, and N+ GaAs 6. An N+ contact
metallurgy 7 is next deposited. This may be Ni/In/W or Ge/In/Mo/W.
Photolithography and etching are used to etch 6 and 7 to form substantially
vertical walls of the etched composite.
Through plasma-enhanced chemical vapor deposition (PECVD), an SiOx layer 8
is laid down. This may also be SixNy . A coat of resist 9 is formed and
photolithography and reactive ion etch (RIE) are then used to pattern the SiOx 8,
with the resultant sidewalls as indicated in Fig. 1. Referring to Fig. 2, the resist 9
is retained and exposed N AlGaAs 5 etched. P ions are then implanted into the
exposed semiconductor as shown at 10 in Fig....