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Method for Producing a Two-Thirds Frequency Clock With Variable Duty Cycle

IP.com Disclosure Number: IPCOM000058393D
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Buckland, PA Hurlimann, DE [+details]

Abstract

A method is described which provides an output clock that is two-thirds of the input clock frequency and provides increased flexibility by having a programmable duty cycle. The method attains a frequency on the output that is two-thirds of the input clock frequency. The first half of the circuitry, shown in Fig. 1, produces two clocks that are each one-third of the input frequency. These two clocks are equal in frequency, but are time delayed from one another. The second half of the circuitry combines these two clocks to produce a clock that is two thirds of the input clock frequency. By having the ability to program a register, one of the clocks can be delayed in order to obtain the desired duty cycle.