High Performance Updated-Type Snoop Cache Protocol
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2005-Feb-15
This article describes a new snoop cache protocol to keep the multi- cache consistency in a shared-bus interconnected multi-processor system. In the shared-bus interconnected multi-processor system, the system performance depends on the traffic on the shared-bus, because access conflicts to the shared-bus and the shared-memory declines the system performance. In order to solve this problem, each processor has a private cache to reduce the bus traffic caused by memory accesses. However, it allows that more than two copies of the identical data exist simultaneously in the system, and the consistency among this data must be always kept. The snoop cache mechanism is used to maintain this cache consistency by hardware.