Browse Prior Art Database

TAB Design With Burn-In Feature

IP.com Disclosure Number: IPCOM000058458D
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Katyl, RH [+details]

Abstract

Memory chips which are prone to early failure can be culled out by a technique referred to as burn-in. Chips are packaged on modules and mounted in special test circuit cards which power the chips up. External circuitry is then used to exercise the chips through a test pattern. These fixtured chips are placed in ovens, baked while being cycled through the test patterns, removed from the ovens, and tested. This is referred to as dynamic burn-in. It is not normally possible to burn-in chips which are mounted on tape automated bonding (TAB) tape. The chips must be mounted in modules prior to burn-in. Burning-in chips packaged on TAB tape reels would be advantageous as bad chips could be found before they are packaged into modules, and loading and unloading of individual modules would be eliminated.